Introduction

This chapter contains a description of the "Hornet" IC. The Hornet IC is truly a PC on-a-chip. It is designed to be used in conjunction with only an LCD module and ROM/RAM chips to implement a system with a high degree of PC compatibility. This chip is divided into the following functional areas:

  1. An 80186 CPU core.

  2. An 8259-compatible Programmable Interrupt Controller (PIC). For a detailed description, see "Interrupt Control" on page 15-554.

  3. An 8254-compatible Programmable Interval Timer (PIT). More information can be found in "Programmable Interval Timer" on page 15-557.

  4. A set of PC-compatible I/O registers for system configuration (8255 equivalent). See "PC-Compatible I/O Registers" on page 15-560 for more information.

  5. A 26-bit, 1Hz timer used by software to keep track of time and date and to implement alarms. See "Real-Time Clock Timer" on page 15-558.

  6. A 8250/16450 compatible UART used for both RS-232 and infrared (IR) communication. See "UART" on page 15-551.

  7. A low frequency (32.768 KHz) quartz-crystal oscillator. This oscillator supplies clocks to the timer and to the display controller. For a detailed description, see"Low Frequency Oscillator" on
    page 15-560.

  8. A high frequency (15.836774MHz) quartz-crystal oscillator. This undivided frequency is used to drive the CPU clock. For more information, see "High Frequency Oscillator" on page 15-560.

  9. A clock generator that uses the output of the high frequency oscillator (HFO) to generate PC-compatible frequencies for the PIT and the UART. See "Clock Generator" on page 15-561.

  10. A CPU bus interface and memory controller. This block contains the functionality of the 8288 bus controller plus address latches, address/data transceivers, data crossover logic, and internal/external chip enable decoding. It also includes PCMCIA-compatible bank-switching logic. The memory controller can support up to five ROM/RAM devices and 2 plug-in cards. It will interface to ROMs, SRAMs, self-refresh DRAMs, PCMCIA memory cards, and I/O cards. See "CPU Bus Interface" on page 15-496 and "Memory Controller" on page 15-497 for more.

  11. A display controller that supports the CGA standard on a 200-row by 640-column LCD module. The display controller also supports a 95LX-compatibility mode that has a movable 16-line by 40-character window into the 25-line by 80-character MDA standard. For more information, see "Display Controller" on page 15-507.

  12. A "bit blitter" that is used to accelerate bit mapped character transfers into the CGA graphics frame buffer. See "BitBlt Co-Processor" on page 15-539 for details.

  13. A keyboard controller that interfaces directly to a keyboard switch matrix of up to 8 rows by 16 columns plus a separate, dedicated ON key. PC-compatible key codes are generated by the BIOS.See "Keyboard Controller" on page 15-543 and "Int 09h: Keyboard Translate Interrupt" for details.

  14. IR control logic for support of IR communication with previous HP devices using either the UART or REDEYE format. A current-regulated driver is provided for direct drive of the IR LED. IR communication speeds of up to 9600 baud are supported in the HP palmtop. For more information, see "IR Communication" on page 15-551.

  15. An A/D converter used to monitor the voltage levels of three analog inputs (two batteries and a reference). See "Analog-to-Digital Converter" on page 15-561.

  16. A power management circuit that interfaces with the external power supply. This external supply operates in low power, high power, and backup power modes. The power management block also includes a power-on reset (POR) circuit. For details, see "Power Management" on page 16-563.

  17. A contrast control voltage generator to control the external LCD voltage generation. This digital circuit outputs a modulated pulse width signal that is filtered externally to implement a 5-bit D/A.